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  advanced power n-channel enhancement mode electronics corp. power mosfet fast switching characteristic v ds @ t j,max. 550v simple drive requirement r ds(on) 0.28 rohs compliant & halogen-free i d 13a description absolute maximum ratings@ t j =25 o c(unless otherwise specified) symbol units v ds drain-source voltage v v gs gate-source voltage v i d @t c =25 drain current, v gs @ 10v 3,4 a i d @t c =100 drain current, v gs @ 10v 3,4 a i dm pulsed drain current 1 a dv/dt mosfet dv/dt ruggedness (v ds = 0 ?400v ) v/ns p d @t c =25 total power dissipation w p d @t a =25 total power dissipation w e as single pulse avalanche energy 5 mj dv/dt peak diode recovery dv/dt 6 v/ns t stg storage temperature range t j operating junction temperature range thermal data symbol parameter value units rthj-c maximum thermal resistance, junction-case 4 /w rthj-a 65 /w data & specifications subject to change without notice AP14SL50I-hf 31.2 500 + 20 13 8.2 32 rating 1.92 -55 to 150 -55 to 150 maximum thermal resistance, junction-ambient halogen-free product 1 201503163 parameter 50 108 15 g d s g d s to-220cfm(i) ap14sl50 series are from advanced power innovated design and silicon process technology to achieve the lowest possible on- resistance and fast switching performance. it provides the designe r with an extreme efficient device for use in a wide range of powe r applications. the to-220cfm package is widely preferred for all commercial- industrial through hole applications. the mold compound provides a high isolation voltage capability and low thermal resistance between the tab and the external heat-sink. .
electrical characteristics@t j =25 o c(unless otherwise specified) symbol parameter test conditions min. typ. max. units bv dss drain-source breakdown voltage v gs =0v, i d =250ua 500 - - v r ds(on) static drain-source on-resistance 2 v gs =10v, i d =4a - - 0.28 v gs(th) gate threshold voltage v ds =v gs , i d =250ua 2 - 5 v g fs forward transconductance v ds =10v, i d =4a - 9 - s i dss drain-source leakage current v ds =400v, v gs =0v - - 100 ua i gss gate-source leakage v gs =+ 20v, v ds =0v - - + 100 na q g total gate charge i d =4a - 26 41.6 nc q gs gate-source charge v ds =400v - 4 - nc q gd gate-drain ("miller") charge v gs =10v - 10 - nc t d(on) turn-on delay time v dd =250v - 10 - ns t r rise time i d =4a - 8 - ns t d(off) turn-off delay time r g =3.3 ? -34- ns t f fall time v gs =10v - 10 - ns c iss input capacitance v gs =0v - 910 1456 pf c oss output capacitance v ds =100v - 45 - pf c rss reverse transfer capacitance f=1.0mhz - 1.5 - pf r g gate resistance f=1.0mhz - 3.6 7.2 source-drain diode symbol parameter test conditions min. typ. max. units v sd forward on voltage 2 i s =4a, v gs =0v - 0.8 - v t rr reverse recovery time i s =13a, v gs =0v - 290 - ns q rr reverse recovery charge di/dt=50a/s - 2 - c notes: 1.pulse width limited by max. junction temperature. 2.pulse test 3.limited by max. junction temperature. maximum duty cycle d=0.75 5.starting t j =25 o c , v dd =50v , l=150mh , r g =25 6.i sd Q i d , v dd Q bv dss , starting t j = 25 o c this product is sensitive to electrostatic discharge, please handle with caution. use of this product as a critical component in life support or other similar systems is not authorized. apec does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. apec reserves the right to make changes without further notice to any products herein to improve reliability, function or design. AP14SL50I-hf 2 4.ensure that the junction temperature does not exceed t jmax. . .
AP14SL50I-h f 0.37 fig 1. typical output characteristics fig 2. typical output characteristics fig 3. on-resistance v.s. gate voltage fig 4. normalized on-resistance v.s. junction temperature fi g 5. forward characteristic o f fig 6. gate threshold voltage v.s. reverse diode junction temperature 3 0 1 2 3 4 -50 0 50 100 150 t j , junction temperature ( o c ) normalized r ds(on) i d =4a v g =10v 0 10 20 30 0 4 8 12 16 20 24 v ds , drain-to-source voltage (v) i d , drain current (a) t c =25 o c 8.0v 7.0v 6.0v v g =5.0v 0 4 8 12 16 0 4 8 12162024 v ds , drain-to-source voltage (v) i d , drain current (a) t c =150 o c 8.0v 7.0v 6.0v v g =5.0v 0.1 1 10 0 0.2 0.4 0.6 0.8 1 1.2 v sd (v) i s (a) t j = 150 o c t j = 25 o c 0 0.5 1 1.5 2 -50 -25 0 25 50 75 100 125 150 t j , junction temperature ( o c ) normalized v gs(th) i d =250ua 200 300 400 500 600 246810 v gs gate-to-source voltage (v) r ds(on) (m ) i d =4a t c =25 o c 10v 10v .
AP14SL50I-hf 0.37 fig 7. gate charge characteristics fig 8. typical capacitance characteristics fig 9. maximum safe operating area fig10. effective transient thermal impedance fig 11. switching time waveform fig 12. gate charge waveform 4 0 1000 2000 3000 4000 0 100 200 300 400 500 600 v ds , drain-to-source voltage (v) c (pf) f =1.0mh z c iss c oss c rss 0 2 4 6 8 10 12 0 8 16 24 32 q g , total gate charge (nc) v gs , gate to source voltage (v) i d =4a v ds =400v 0.01 0.1 1 0.00001 0.0001 0.001 0.01 0.1 1 10 t , pulse width (s) normalized thermal response (r thjc ) p dm duty factor = t/t peak t j = p dm x r thjc + t c t t 0.02 0.01 0.05 0.1 0.2 duty factor=0.5 single pulse 0.01 0.1 1 10 100 1 10 100 1000 v ds , drain-to-source voltage (v) i d (a) t c =25 o c s ingle pulse 10us 100us 1ms 10ms 100ms 1s dc q v g 10v q gs q gd q g charge operation in this area limited by r ds(on) t d(on) t r t d(off) t f v ds v gs 10% 90% .
AP14SL50I-hf marking information 5 part numbe r package code date code (ywwsss) y last digit of the year ww week sss sequence 14sl50i ywwsss .


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